Wilder Technologies SATA 2.5 Test Adapter Especificaciones descargar pdf (Pagina 34)

Agilent Technologies, Inc.

Agilent Technologies, Inc. 34 SATA PHY, TSG & OOB Test MOI v.1.1 Revision 1.4

Test TSG-13 - Gen3 (6.0Gbps) Transmit Jitter before and after CIC, Clock

to Data (JTF Defined)

Purpose: To verify that the TJ of the product’s transmitter is within the conformance limits, both at the near-end

connector compliance point and at the far-end of the Compliance Interconnect Channel (CIC).

References:

[1] Serial ATA Revision 3.0, 7.2.1, Table 31 – Transmitted Signal Requirements

[2] Ibid, 7.2.2.2.18

[3] Ibid, 7.3.2.4, 7.4.8, 7.4.10

[4] SATA Interoperability Program Unified Test Document, 2.15.13 – Gen3 (6Gb/s) Transmit Jitter

[5] Pre-Test MOI

Resource Requirements:

Same as for TSG-01.

See appendix A for details.

Last Template Modification: March 25, 2009 (Version 1.02)

Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA products. This specification

includes conformance limits for the TJ both at the near-end connector compliance point and at the far-end

of the compliance Interconnect Channel (CIC). Reference [2] provides the definition of this term for the

purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

This test requirement is only applicable to products running at 6Gb/s.

For the Integrator’s List test program jitter measurements are required to be made with HFTP, MFTP,

LFTP, SSOP and LBP. RJ is measured as an RMS value directly from the transmitter connector

(compliance interface) into a laboratory load using the MFTP pattern. The RMS RJ value is multiplied by

14 to compute its peak-to-peak value at a BER level of 10E-12. RJpp measured must not exceed 0.18 UI.

Total Jitter is then measured both before and after the CIC channel at a BER level of 10E-12 and must not

exceed 0.34 UI + RJpp measured. Unlike the jitter measurements for 3Gb/s and 1.5Gb/s, the TJ limits

allowed for products running at 6Gb/s are dynamic and dependent on the amount of measured RJ. SATA

ECN-39 outlines modified provision to TSG-13 where TJ peak-to-peak value at BER levels of 10E-6 and

10E-12 are evaluated. The Compliance Interconnect Channel for this test is implemented as a frequency-

domain filter created from the standard SATA_CIC_Spec.s4p file, which includes both frequency and

phase information as measured directly from the hardware CIC model defined in [1]. Implementation of

the CIC in this fashion allows for no disruption of the laboratory load connection during jitter testing, and

prevents the addition of additional cabling loss between the product under test and the laboratory load.

Test Setup:

1. The N5411B SATA compliance software will prompt for HFTP, MFTP, LFTP, LBP and/or SSOP when

it needs those patterns. When prompted, follow the procedures in reference [5] to enable those BIST-TAS

patterns. Or keep products in BIST-L.

2. Plug the test fixture into the products. The test fixture is connected to channels 1 and 3 of the scope by

two 36” SMA cables (Rosenberger or equivalent). OBSERVE the signal on the scope. If it is correct, press

OK in the N5411B prompt. If not, the products did not properly handle BIST Activate FIS; a non-standard

way to make it produce the desired pattern will be required.

Test Procedure:

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